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Add more cache descriptors for L3 caches on x86 and x86-64.

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The most recent AP 485 describes a few more cache descriptors for
L3 caches with 24-way associativity.
This commit is contained in:
Ulrich Drepper 2009-07-23 13:42:46 -07:00
parent d28797e426
commit 3e9099b4f6
3 changed files with 10 additions and 0 deletions
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4
ChangeLog
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@ -1,5 +1,9 @@
2009-07-23 Ulrich Drepper <drepper@redhat.com>
* sysdeps/unix/sysv/linux/i386/sysconf.c (intel_02_known): Add more
cache descriptors.
* sysdeps/x86_64/cacheinfo.c (intel_02_known): Likewise.
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): Reset
SSSE3 bit for Atoms.
* sysdeps/x86_64/multiarch/strcpy.S: New need to perform Atom test

3
sysdeps/unix/sysv/linux/i386/sysconf.c
View file

@ -138,6 +138,9 @@ static const struct intel_02_cache_info
{ 0xe3, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 2097152 },
{ 0xe3, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 4194304 },
{ 0xe4, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 8388608 },
{ 0xea, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 12582912 },
{ 0xeb, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 18874368 },
{ 0xec, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 25165824 },
};
#define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known[0]))

3
sysdeps/x86_64/cacheinfo.c
View file

@ -100,6 +100,9 @@ static const struct intel_02_cache_info
{ 0xe3, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 2097152 },
{ 0xe3, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 4194304 },
{ 0xe4, 16, 64, M(_SC_LEVEL3_CACHE_SIZE), 8388608 },
{ 0xea, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 12582912 },
{ 0xeb, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 18874368 },
{ 0xec, 24, 64, M(_SC_LEVEL3_CACHE_SIZE), 25165824 },
};
#define nintel_02_known (sizeof (intel_02_known) / sizeof (intel_02_known [0]))