ace614b8a5
IEEE 754-2008 defines two ways in which tiny results can be detected, "before rounding" (based on the infinite-precision result) and "after rounding" (based on the result when rounded to normal precision as if the exponent range were unbounded). All binary operations on an architecture must use the same choice of how tininess is detected. soft-fp has so far implemented only before-rounding tininess detection. This patch adds support for after-rounding tininess detection. A new macro _FP_TININESS_AFTER_ROUNDING is added that sfp-machine.h must define (soft-fp is meant to be self-contained so the existing tininess.h files aren't used here, though the information going in sfp-machine.h has been taken from them). The soft-fp macros dealing with raising underflow exceptions then handle the cases where the choice matters specially, rounding a copy of the input to the appropriate precision to see if a value that's tiny before rounding isn't tiny after rounding. Tested for mips64 using GCC trunk (which now uses soft-fp on MIPS, so supporting exceptions and rounding modes for long double where not previously supported - this is the immediate motivation for doing this patch now) together with (a) a patch to sysdeps/mips/math-tests.h to enable exceptions / rounding modes tests for long double for GCC 4.9 and later, and (b) corresponding changes applied to libgcc's soft-fp and sfp-machine.h files. In the libgcc context this is also tested on x86_64 (also an after-rounding architecture) with testcases for __float128 that I intend to add to the GCC testsuite when updating soft-fp there. (To be clear: this patch does not fix any glibc bugs that were user-visible in past releases, since after-rounding architectures didn't use soft-fp in any affected case with support for floating-point exceptions - so there is no corresponding Bugzilla bug. Rather, it works together with the GCC changes to use soft-fp on MIPS to allow previously absent long double functionality to work properly, and allows soft-fp to be used in glibc on after-rounding architectures in cases where it couldn't previously be used.) * soft-fp/op-common.h (_FP_DECL): Mark exponent as possibly unused. (_FP_PACK_SEMIRAW): Determine tininess based on rounding shifted value if _FP_TININESS_AFTER_ROUNDING and unrounded value is in subnormal range. (_FP_PACK_CANONICAL): Determine tininess based on rounding to normal precision if _FP_TININESS_AFTER_ROUNDING and unrounded value has largest subnormal exponent. * soft-fp/soft-fp.h [FP_NO_EXCEPTIONS] (_FP_TININESS_AFTER_ROUNDING): Undefine and redefine to 0. * sysdeps/aarch64/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): New macro. * sysdeps/alpha/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/arm/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/mips/mips64/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/mips/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/powerpc/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/sh/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/sparc/sparc32/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/sparc/sparc64/soft-fp/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise. * sysdeps/tile/sfp-machine.h (_FP_TININESS_AFTER_ROUNDING): Likewise.
121 lines
3.6 KiB
C
121 lines
3.6 KiB
C
#include <fenv.h>
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#include <fpu_control.h>
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#define _FP_W_TYPE_SIZE 64
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#define _FP_W_TYPE unsigned long long
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#define _FP_WS_TYPE signed long long
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#define _FP_I_TYPE long long
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
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#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
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#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
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#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
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#define _FP_NANSIGN_S 0
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#define _FP_NANSIGN_D 0
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#define _FP_NANSIGN_Q 0
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#define _FP_KEEPNANFRACP 1
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#define _FP_QNANNEGATEDP 0
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/* From my experiments it seems X is chosen unless one of the
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NaNs is sNaN, in which case the result is NANSIGN/NANFRAC. */
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if ((_FP_FRAC_HIGH_RAW_##fs(X) | \
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_FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs) \
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{ \
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R##_s = _FP_NANSIGN_##fs; \
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_FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs); \
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} \
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else \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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#define _FP_DECL_EX fpu_control_t _fcw
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#define FP_ROUNDMODE (_fcw & _FPU_FPCR_RM_MASK)
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#define FP_RND_NEAREST FE_TONEAREST
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#define FP_RND_ZERO FE_TOWARDZERO
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#define FP_RND_PINF FE_UPWARD
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#define FP_RND_MINF FE_DOWNWARD
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#define FP_EX_INVALID FE_INVALID
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#define FP_EX_OVERFLOW FE_OVERFLOW
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#define FP_EX_UNDERFLOW FE_UNDERFLOW
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#define FP_EX_DIVZERO FE_DIVBYZERO
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#define FP_EX_INEXACT FE_INEXACT
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#define _FP_TININESS_AFTER_ROUNDING 0
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#define FP_INIT_ROUNDMODE \
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do { \
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_FPU_GETCW (_fcw); \
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} while (0)
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#define FP_HANDLE_EXCEPTIONS \
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do { \
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const float fp_max = __FLT_MAX__; \
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const float fp_min = __FLT_MIN__; \
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const float fp_1e32 = 1.0e32f; \
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const float fp_zero = 0.0; \
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const float fp_one = 1.0; \
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unsigned fpsr; \
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if (_fex & FP_EX_INVALID) \
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{ \
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__asm__ __volatile__ ("fdiv\ts0, %s0, %s0" \
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: \
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: "w" (fp_zero) \
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: "s0"); \
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__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
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} \
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if (_fex & FP_EX_DIVZERO) \
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{ \
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__asm__ __volatile__ ("fdiv\ts0, %s0, %s1" \
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: \
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: "w" (fp_one), "w" (fp_zero) \
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: "s0"); \
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__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
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} \
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if (_fex & FP_EX_OVERFLOW) \
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{ \
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__asm__ __volatile__ ("fadd\ts0, %s0, %s1" \
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: \
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: "w" (fp_max), "w" (fp_1e32) \
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: "s0"); \
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__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
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} \
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if (_fex & FP_EX_UNDERFLOW) \
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{ \
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__asm__ __volatile__ ("fmul\ts0, %s0, %s0" \
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: \
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: "w" (fp_min) \
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: "s0"); \
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__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
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} \
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if (_fex & FP_EX_INEXACT) \
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{ \
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__asm__ __volatile__ ("fsub\ts0, %s0, %s1" \
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: \
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: "w" (fp_max), "w" (fp_one) \
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: "s0"); \
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__asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr)); \
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} \
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} while (0)
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#define FP_TRAPPING_EXCEPTIONS ((_fcw >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT)
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