75eff3fe90
This patch moves the AArch64 port to the main sysdeps hierarchy. The move is essentially: git mv ports/sysdeps/aarch64 sysdeps/aarch64 git mv ports/sysdeps/unix/sysv/linux/aarch64 sysdeps/unix/sysv/linux/aarch64 The README is updated and I've updated ChangeLog.aarch64 along the lines of the ARM move. The AArch64 build has been tested to confirm that there were no changes in objdump -dr output or the shared objects.
162 lines
4.7 KiB
ArmAsm
162 lines
4.7 KiB
ArmAsm
/* strnlen - calculate the length of a string with limit.
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Copyright (C) 2013-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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*/
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/* Arguments and results. */
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#define srcin x0
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#define len x0
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#define limit x1
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/* Locals and temporaries. */
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#define src x2
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#define data1 x3
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#define data2 x4
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#define data2a x5
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#define has_nul1 x6
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#define has_nul2 x7
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#define tmp1 x8
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#define tmp2 x9
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#define tmp3 x10
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#define tmp4 x11
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#define zeroones x12
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#define pos x13
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#define limit_wd x14
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#define REP8_01 0x0101010101010101
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#define REP8_7f 0x7f7f7f7f7f7f7f7f
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#define REP8_80 0x8080808080808080
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ENTRY_ALIGN_AND_PAD (__strnlen, 6, 9)
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cbz limit, L(hit_limit)
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mov zeroones, #REP8_01
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bic src, srcin, #15
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ands tmp1, srcin, #15
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b.ne L(misaligned)
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/* Calculate the number of full and partial words -1. */
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sub limit_wd, limit, #1 /* Limit != 0, so no underflow. */
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lsr limit_wd, limit_wd, #4 /* Convert to Qwords. */
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/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
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(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
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can be done in parallel across the entire word. */
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/* The inner loop deals with two Dwords at a time. This has a
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slightly higher start-up cost, but we should win quite quickly,
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especially on cores with a high number of issue slots per
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cycle, as we get much better parallelism out of the operations. */
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/* Start of critial section -- keep to one 64Byte cache line. */
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L(loop):
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ldp data1, data2, [src], #16
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L(realigned):
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sub tmp1, data1, zeroones
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orr tmp2, data1, #REP8_7f
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sub tmp3, data2, zeroones
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orr tmp4, data2, #REP8_7f
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bic has_nul1, tmp1, tmp2
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bic has_nul2, tmp3, tmp4
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subs limit_wd, limit_wd, #1
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orr tmp1, has_nul1, has_nul2
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ccmp tmp1, #0, #0, pl /* NZCV = 0000 */
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b.eq L(loop)
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/* End of critical section -- keep to one 64Byte cache line. */
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orr tmp1, has_nul1, has_nul2
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cbz tmp1, L(hit_limit) /* No null in final Qword. */
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/* We know there's a null in the final Qword. The easiest thing
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to do now is work out the length of the string and return
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MIN (len, limit). */
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sub len, src, srcin
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cbz has_nul1, L(nul_in_data2)
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#ifdef __AARCH64EB__
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mov data2, data1
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#endif
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sub len, len, #8
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mov has_nul2, has_nul1
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L(nul_in_data2):
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#ifdef __AARCH64EB__
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/* For big-endian, carry propagation (if the final byte in the
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string is 0x01) means we cannot use has_nul directly. The
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easiest way to get the correct byte is to byte-swap the data
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and calculate the syndrome a second time. */
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rev data2, data2
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sub tmp1, data2, zeroones
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orr tmp2, data2, #REP8_7f
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bic has_nul2, tmp1, tmp2
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#endif
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sub len, len, #8
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rev has_nul2, has_nul2
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clz pos, has_nul2
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add len, len, pos, lsr #3 /* Bits to bytes. */
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cmp len, limit
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csel len, len, limit, ls /* Return the lower value. */
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RET
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L(misaligned):
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/* Deal with a partial first word.
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We're doing two things in parallel here;
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1) Calculate the number of words (but avoiding overflow if
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limit is near ULONG_MAX) - to do this we need to work out
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limit + tmp1 - 1 as a 65-bit value before shifting it;
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2) Load and mask the initial data words - we force the bytes
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before the ones we are interested in to 0xff - this ensures
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early bytes will not hit any zero detection. */
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sub limit_wd, limit, #1
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neg tmp4, tmp1
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cmp tmp1, #8
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and tmp3, limit_wd, #15
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lsr limit_wd, limit_wd, #4
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mov tmp2, #~0
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ldp data1, data2, [src], #16
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lsl tmp4, tmp4, #3 /* Bytes beyond alignment -> bits. */
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add tmp3, tmp3, tmp1
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#ifdef __AARCH64EB__
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/* Big-endian. Early bytes are at MSB. */
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lsl tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
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#else
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/* Little-endian. Early bytes are at LSB. */
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lsr tmp2, tmp2, tmp4 /* Shift (tmp1 & 63). */
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#endif
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add limit_wd, limit_wd, tmp3, lsr #4
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orr data1, data1, tmp2
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orr data2a, data2, tmp2
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csinv data1, data1, xzr, le
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csel data2, data2, data2a, le
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b L(realigned)
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L(hit_limit):
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mov len, limit
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RET
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END (__strnlen)
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weak_alias (__strnlen, strnlen)
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libc_hidden_def (strnlen)
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