315 lines
8.6 KiB
ArmAsm
315 lines
8.6 KiB
ArmAsm
/* Optimized AArch64 implementation of ChaCha20 cipher.
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Copyright (C) 2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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/* Copyright (C) 2017-2019 Jussi Kivilinna <jussi.kivilinna@iki.fi>
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This file is part of Libgcrypt.
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Libgcrypt is free software; you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as
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published by the Free Software Foundation; either version 2.1 of
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the License, or (at your option) any later version.
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Libgcrypt is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this program; if not, see <https://www.gnu.org/licenses/>.
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*/
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/* Based on D. J. Bernstein reference implementation at
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http://cr.yp.to/chacha.html:
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chacha-regs.c version 20080118
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D. J. Bernstein
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Public domain. */
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#include <sysdep.h>
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/* Only LE is supported. */
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#ifdef __AARCH64EL__
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#define GET_DATA_POINTER(reg, name) \
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adrp reg, name ; \
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add reg, reg, :lo12:name
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/* 'ret' instruction replacement for straight-line speculation mitigation */
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#define ret_spec_stop \
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ret; dsb sy; isb;
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.cpu generic+simd
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.text
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/* register macros */
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#define INPUT x0
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#define DST x1
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#define SRC x2
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#define NBLKS x3
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#define ROUND x4
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#define INPUT_CTR x5
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#define INPUT_POS x6
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#define CTR x7
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/* vector registers */
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#define X0 v16
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#define X4 v17
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#define X8 v18
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#define X12 v19
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#define X1 v20
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#define X5 v21
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#define X9 v22
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#define X13 v23
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#define X2 v24
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#define X6 v25
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#define X3 v26
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#define X7 v27
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#define X11 v28
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#define X15 v29
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#define X10 v30
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#define X14 v31
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#define VCTR v0
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#define VTMP0 v1
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#define VTMP1 v2
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#define VTMP2 v3
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#define VTMP3 v4
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#define X12_TMP v5
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#define X13_TMP v6
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#define ROT8 v7
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/**********************************************************************
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helper macros
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**********************************************************************/
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#define _(...) __VA_ARGS__
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#define vpunpckldq(s1, s2, dst) \
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zip1 dst.4s, s2.4s, s1.4s;
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#define vpunpckhdq(s1, s2, dst) \
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zip2 dst.4s, s2.4s, s1.4s;
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#define vpunpcklqdq(s1, s2, dst) \
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zip1 dst.2d, s2.2d, s1.2d;
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#define vpunpckhqdq(s1, s2, dst) \
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zip2 dst.2d, s2.2d, s1.2d;
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/* 4x4 32-bit integer matrix transpose */
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#define transpose_4x4(x0, x1, x2, x3, t1, t2, t3) \
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vpunpckhdq(x1, x0, t2); \
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vpunpckldq(x1, x0, x0); \
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\
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vpunpckldq(x3, x2, t1); \
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vpunpckhdq(x3, x2, x2); \
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\
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vpunpckhqdq(t1, x0, x1); \
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vpunpcklqdq(t1, x0, x0); \
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\
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vpunpckhqdq(x2, t2, x3); \
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vpunpcklqdq(x2, t2, x2);
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/**********************************************************************
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4-way chacha20
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**********************************************************************/
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#define XOR(d,s1,s2) \
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eor d.16b, s2.16b, s1.16b;
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#define PLUS(ds,s) \
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add ds.4s, ds.4s, s.4s;
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#define ROTATE4(dst1,dst2,dst3,dst4,c,src1,src2,src3,src4) \
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shl dst1.4s, src1.4s, #(c); \
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shl dst2.4s, src2.4s, #(c); \
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shl dst3.4s, src3.4s, #(c); \
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shl dst4.4s, src4.4s, #(c); \
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sri dst1.4s, src1.4s, #(32 - (c)); \
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sri dst2.4s, src2.4s, #(32 - (c)); \
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sri dst3.4s, src3.4s, #(32 - (c)); \
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sri dst4.4s, src4.4s, #(32 - (c));
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#define ROTATE4_8(dst1,dst2,dst3,dst4,src1,src2,src3,src4) \
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tbl dst1.16b, {src1.16b}, ROT8.16b; \
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tbl dst2.16b, {src2.16b}, ROT8.16b; \
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tbl dst3.16b, {src3.16b}, ROT8.16b; \
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tbl dst4.16b, {src4.16b}, ROT8.16b;
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#define ROTATE4_16(dst1,dst2,dst3,dst4,src1,src2,src3,src4) \
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rev32 dst1.8h, src1.8h; \
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rev32 dst2.8h, src2.8h; \
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rev32 dst3.8h, src3.8h; \
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rev32 dst4.8h, src4.8h;
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#define QUARTERROUND4(a1,b1,c1,d1,a2,b2,c2,d2,a3,b3,c3,d3,a4,b4,c4,d4,ign,tmp1,tmp2,tmp3,tmp4) \
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PLUS(a1,b1); PLUS(a2,b2); \
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PLUS(a3,b3); PLUS(a4,b4); \
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XOR(tmp1,d1,a1); XOR(tmp2,d2,a2); \
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XOR(tmp3,d3,a3); XOR(tmp4,d4,a4); \
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ROTATE4_16(d1, d2, d3, d4, tmp1, tmp2, tmp3, tmp4); \
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PLUS(c1,d1); PLUS(c2,d2); \
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PLUS(c3,d3); PLUS(c4,d4); \
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XOR(tmp1,b1,c1); XOR(tmp2,b2,c2); \
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XOR(tmp3,b3,c3); XOR(tmp4,b4,c4); \
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ROTATE4(b1, b2, b3, b4, 12, tmp1, tmp2, tmp3, tmp4) \
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PLUS(a1,b1); PLUS(a2,b2); \
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PLUS(a3,b3); PLUS(a4,b4); \
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XOR(tmp1,d1,a1); XOR(tmp2,d2,a2); \
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XOR(tmp3,d3,a3); XOR(tmp4,d4,a4); \
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ROTATE4_8(d1, d2, d3, d4, tmp1, tmp2, tmp3, tmp4) \
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PLUS(c1,d1); PLUS(c2,d2); \
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PLUS(c3,d3); PLUS(c4,d4); \
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XOR(tmp1,b1,c1); XOR(tmp2,b2,c2); \
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XOR(tmp3,b3,c3); XOR(tmp4,b4,c4); \
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ROTATE4(b1, b2, b3, b4, 7, tmp1, tmp2, tmp3, tmp4) \
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.align 4
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L(__chacha20_blocks4_data_inc_counter):
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.long 0,1,2,3
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.align 4
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L(__chacha20_blocks4_data_rot8):
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.byte 3,0,1,2
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.byte 7,4,5,6
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.byte 11,8,9,10
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.byte 15,12,13,14
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.hidden __chacha20_neon_blocks4
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ENTRY (__chacha20_neon_blocks4)
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/* input:
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* x0: input
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* x1: dst
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* x2: src
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* x3: nblks (multiple of 4)
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*/
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GET_DATA_POINTER(CTR, L(__chacha20_blocks4_data_rot8))
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add INPUT_CTR, INPUT, #(12*4);
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ld1 {ROT8.16b}, [CTR];
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GET_DATA_POINTER(CTR, L(__chacha20_blocks4_data_inc_counter))
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mov INPUT_POS, INPUT;
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ld1 {VCTR.16b}, [CTR];
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L(loop4):
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/* Construct counter vectors X12 and X13 */
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ld1 {X15.16b}, [INPUT_CTR];
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mov ROUND, #20;
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ld1 {VTMP1.16b-VTMP3.16b}, [INPUT_POS];
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dup X12.4s, X15.s[0];
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dup X13.4s, X15.s[1];
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ldr CTR, [INPUT_CTR];
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add X12.4s, X12.4s, VCTR.4s;
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dup X0.4s, VTMP1.s[0];
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dup X1.4s, VTMP1.s[1];
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dup X2.4s, VTMP1.s[2];
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dup X3.4s, VTMP1.s[3];
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dup X14.4s, X15.s[2];
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cmhi VTMP0.4s, VCTR.4s, X12.4s;
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dup X15.4s, X15.s[3];
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add CTR, CTR, #4; /* Update counter */
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dup X4.4s, VTMP2.s[0];
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dup X5.4s, VTMP2.s[1];
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dup X6.4s, VTMP2.s[2];
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dup X7.4s, VTMP2.s[3];
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sub X13.4s, X13.4s, VTMP0.4s;
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dup X8.4s, VTMP3.s[0];
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dup X9.4s, VTMP3.s[1];
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dup X10.4s, VTMP3.s[2];
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dup X11.4s, VTMP3.s[3];
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mov X12_TMP.16b, X12.16b;
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mov X13_TMP.16b, X13.16b;
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str CTR, [INPUT_CTR];
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L(round2):
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subs ROUND, ROUND, #2
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QUARTERROUND4(X0, X4, X8, X12, X1, X5, X9, X13,
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X2, X6, X10, X14, X3, X7, X11, X15,
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tmp:=,VTMP0,VTMP1,VTMP2,VTMP3)
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QUARTERROUND4(X0, X5, X10, X15, X1, X6, X11, X12,
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X2, X7, X8, X13, X3, X4, X9, X14,
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tmp:=,VTMP0,VTMP1,VTMP2,VTMP3)
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b.ne L(round2);
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ld1 {VTMP0.16b, VTMP1.16b}, [INPUT_POS], #32;
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PLUS(X12, X12_TMP); /* INPUT + 12 * 4 + counter */
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PLUS(X13, X13_TMP); /* INPUT + 13 * 4 + counter */
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dup VTMP2.4s, VTMP0.s[0]; /* INPUT + 0 * 4 */
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dup VTMP3.4s, VTMP0.s[1]; /* INPUT + 1 * 4 */
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dup X12_TMP.4s, VTMP0.s[2]; /* INPUT + 2 * 4 */
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dup X13_TMP.4s, VTMP0.s[3]; /* INPUT + 3 * 4 */
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PLUS(X0, VTMP2);
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PLUS(X1, VTMP3);
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PLUS(X2, X12_TMP);
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PLUS(X3, X13_TMP);
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dup VTMP2.4s, VTMP1.s[0]; /* INPUT + 4 * 4 */
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dup VTMP3.4s, VTMP1.s[1]; /* INPUT + 5 * 4 */
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dup X12_TMP.4s, VTMP1.s[2]; /* INPUT + 6 * 4 */
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dup X13_TMP.4s, VTMP1.s[3]; /* INPUT + 7 * 4 */
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ld1 {VTMP0.16b, VTMP1.16b}, [INPUT_POS];
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mov INPUT_POS, INPUT;
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PLUS(X4, VTMP2);
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PLUS(X5, VTMP3);
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PLUS(X6, X12_TMP);
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PLUS(X7, X13_TMP);
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dup VTMP2.4s, VTMP0.s[0]; /* INPUT + 8 * 4 */
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dup VTMP3.4s, VTMP0.s[1]; /* INPUT + 9 * 4 */
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dup X12_TMP.4s, VTMP0.s[2]; /* INPUT + 10 * 4 */
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dup X13_TMP.4s, VTMP0.s[3]; /* INPUT + 11 * 4 */
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dup VTMP0.4s, VTMP1.s[2]; /* INPUT + 14 * 4 */
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dup VTMP1.4s, VTMP1.s[3]; /* INPUT + 15 * 4 */
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PLUS(X8, VTMP2);
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PLUS(X9, VTMP3);
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PLUS(X10, X12_TMP);
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PLUS(X11, X13_TMP);
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PLUS(X14, VTMP0);
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PLUS(X15, VTMP1);
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transpose_4x4(X0, X1, X2, X3, VTMP0, VTMP1, VTMP2);
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transpose_4x4(X4, X5, X6, X7, VTMP0, VTMP1, VTMP2);
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transpose_4x4(X8, X9, X10, X11, VTMP0, VTMP1, VTMP2);
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transpose_4x4(X12, X13, X14, X15, VTMP0, VTMP1, VTMP2);
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subs NBLKS, NBLKS, #4;
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st1 {X0.16b,X4.16B,X8.16b, X12.16b}, [DST], #64
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st1 {X1.16b,X5.16b}, [DST], #32;
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st1 {X9.16b, X13.16b, X2.16b, X6.16b}, [DST], #64
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st1 {X10.16b,X14.16b}, [DST], #32;
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st1 {X3.16b, X7.16b, X11.16b, X15.16b}, [DST], #64;
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b.ne L(loop4);
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ret_spec_stop
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END (__chacha20_neon_blocks4)
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#endif
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