Add BTI landing pads for aarch64
When Branch Target Identifier (BTI) is enabled on aarch64, any software which run libglvnd will fail with SIGILL, Illegal instruction. This is because some assembler code misses the BTI landing pads. See: https://developer.arm.com/documentation/102433/0100/Jump-oriented-programming "hint #34" is the same thing as "BTI C" landing pad, but keep compatibility with systems without BTI enabled.
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@ -90,6 +90,7 @@ extern char glx_entrypoint_end[];
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#define STUB_SIZE 16
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#define STUB_SIZE 16
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#define STUB_ASM_ARCH(slot) \
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#define STUB_ASM_ARCH(slot) \
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"hint #34\n" \
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"adrp x16, entrypointFunctions + " slot "*8\n" \
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"adrp x16, entrypointFunctions + " slot "*8\n" \
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"ldr x16, [x16, #:lo12:(entrypointFunctions + " slot "*8)]\n" \
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"ldr x16, [x16, #:lo12:(entrypointFunctions + " slot "*8)]\n" \
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"br x16\n"
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"br x16\n"
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@ -69,6 +69,7 @@
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* table then does a branch without link to the function address.
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* table then does a branch without link to the function address.
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*/
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*/
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#define STUB_ASM_CODE(slot) \
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#define STUB_ASM_CODE(slot) \
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"hint #34\n\t" \
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"stp x1, x0, [sp, #-16]!\n\t" \
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"stp x1, x0, [sp, #-16]!\n\t" \
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"adrp x0, :got:_glapi_Current\n\t" \
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"adrp x0, :got:_glapi_Current\n\t" \
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"ldr x0, [x0, #:got_lo12:_glapi_Current]\n\t" \
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"ldr x0, [x0, #:got_lo12:_glapi_Current]\n\t" \
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