vnd-glapi: allow asm to be used on ELFv2 ppc64 big endian

These entry points are actually not little endian specific,
but they are specific to ELFv2 ABI. ELFv2 ABI can be used
on either little or big endian, and there are distributions
doing so (e.g. Void Linux, Adélie Linux) as well as other
OSes transitioning (FreeBSD).

These have been confirmed to work on a Power Mac G5 running
Void Linux.
This commit is contained in:
q66 2019-12-08 17:39:53 +01:00
parent 4852538bdb
commit c31a7c06eb
10 changed files with 55 additions and 37 deletions

View file

@ -137,8 +137,15 @@ if test "x$enable_asm" = xyes; then
asm_arch=aarch64
;;
powerpc64le)
asm_arch=ppc64le
asm_arch=ppc64
;;
powerpc64)
AC_COMPILE_IFELSE([AC_LANG_SOURCE([
#if !defined(_CALL_ELF) || (_CALL_ELF) == 1
# error "ELFv1 ABI"
#endif
])],
[asm_arch=ppc64],[])
esac
case "$asm_arch" in
@ -158,9 +165,9 @@ if test "x$enable_asm" = xyes; then
DEFINES="$DEFINES -DUSE_AARCH64_ASM"
AC_MSG_RESULT([yes, aarch64])
;;
ppc64le)
DEFINES="$DEFINES -DUSE_PPC64LE_ASM"
AC_MSG_RESULT([yes, ppc64le])
ppc64)
DEFINES="$DEFINES -DUSE_PPC64_ASM"
AC_MSG_RESULT([yes, ppc64])
;;
*)
AC_MSG_RESULT([no, platform '$host_cpu' not supported])
@ -240,13 +247,13 @@ xaarch64)
gldispatch_entry_type=aarch64_tsd
gldispatch_use_tls=no
;;
xppc64le)
# For ppc64le, allow both the TLS and TSD stubs for now.
xppc64)
# For ppc64, allow both the TLS and TSD stubs for now.
if test "x$HAVE_INIT_TLS" = "xyes" ; then
gldispatch_entry_type=ppc64le_tls
gldispatch_entry_type=ppc64_tls
gldispatch_use_tls=yes
else
gldispatch_entry_type=ppc64le_tsd
gldispatch_entry_type=ppc64_tsd
gldispatch_use_tls=no
fi
;;
@ -266,8 +273,8 @@ AM_CONDITIONAL([GLDISPATCH_TYPE_X86_TLS], [test "x$gldispatch_entry_type" = "xx8
AM_CONDITIONAL([GLDISPATCH_TYPE_X86_TSD], [test "x$gldispatch_entry_type" = "xx86_tsd"])
AM_CONDITIONAL([GLDISPATCH_TYPE_X86_64_TLS], [test "x$gldispatch_entry_type" = "xx86_64_tls"])
AM_CONDITIONAL([GLDISPATCH_TYPE_X86_64_TSD], [test "x$gldispatch_entry_type" = "xx86_64_tsd"])
AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64LE_TLS], [test "x$gldispatch_entry_type" = "xppc64le_tls"])
AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64LE_TSD], [test "x$gldispatch_entry_type" = "xppc64le_tsd"])
AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64_TLS], [test "x$gldispatch_entry_type" = "xppc64_tls"])
AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64_TSD], [test "x$gldispatch_entry_type" = "xppc64_tsd"])
AM_CONDITIONAL([GLDISPATCH_TYPE_ARMV7_TSD], [test "x$gldispatch_entry_type" = "xarmv7_tsd"])
AM_CONDITIONAL([GLDISPATCH_TYPE_AARCH64_TSD], [test "x$gldispatch_entry_type" = "xaarch64_tsd"])
AM_CONDITIONAL([GLDISPATCH_TYPE_PURE_C], [test "x$gldispatch_entry_type" = "xpure_c"])

View file

@ -95,9 +95,14 @@ enum {
__GLDISPATCH_STUB_X32,
/*!
* Used for stubs on PPC64LE systems.
* Used for stubs on PPC64 systems.
*/
__GLDISPATCH_STUB_PPC64LE,
__GLDISPATCH_STUB_PPC64,
/*!
* Used for stubs on PPC64LE systems. Same as PPC64, for compatibility.
*/
__GLDISPATCH_STUB_PPC64LE = __GLDISPATCH_STUB_PPC64,
};
/*!

View file

@ -55,8 +55,8 @@ if not with_asm.disabled()
add_project_arguments('-DUSE_ARMV7_ASM', language : 'c')
elif host_machine.cpu_family() == 'aarch64'
add_project_arguments('-DUSE_AARCH64_ASM', language : 'c')
elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
add_project_arguments('-DUSE_PPC64LE_ASM', language : 'c')
elif host_machine.cpu_family() == 'ppc64' and cc.get_define('_CALL_ELF') == '2'
add_project_arguments('-DUSE_PPC64_ASM', language : 'c')
elif with_asm.enabled()
error('No ASM available for @0@ (@1@ endian)'.format(host_machine.system(), host_machine.endian()))
else
@ -117,8 +117,8 @@ if use_asm
gl_dispatch_type = 'armv7_tsd'
elif host_machine.cpu_family() == 'aarch64'
gl_dispatch_type = 'aarch64_tsd'
elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
gl_dispatch_type = 'ppc64le_@0@'.format(have_tls ? 'tls' : 'tsd')
elif host_machine.cpu_family() == 'ppc64'
gl_dispatch_type = 'ppc64_@0@'.format(have_tls ? 'tls' : 'tsd')
endif
endif
message('Using dispatch stub type: @0@'.format(gl_dispatch_type))

View file

@ -97,7 +97,7 @@ extern char glx_entrypoint_end[];
"ldr x16, [x16, #:lo12:(entrypointFunctions + " slot "*8)]\n" \
"br x16\n"
#elif defined(USE_PPC64LE_ASM)
#elif defined(USE_PPC64_ASM) && defined(_CALL_ELF) && (_CALL_ELF == 2)
#define STUB_SIZE 32
#define STUB_ASM_ARCH(slot) \

View file

@ -95,7 +95,7 @@ static void InvalidateCache(void)
// See http://community.arm.com/groups/processors/blog/2010/02/17/caches-and-self-modifying-code
__builtin___clear_cache(public_entry_start, public_entry_end);
}
#elif defined(USE_PPC64LE_ASM)
#elif defined(USE_PPC64_ASM)
static void InvalidateCache(void)
{
// Note: We might be able to get away with only invalidating each cache

View file

@ -38,14 +38,14 @@ MAPI_GLDISPATCH_ENTRY_FILES += entry_simple_asm.c
MAPI_GLDISPATCH_ENTRY_FILES += entry_common.c
endif
if GLDISPATCH_TYPE_PPC64LE_TSD
MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64le_tsd.c
if GLDISPATCH_TYPE_PPC64_TSD
MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64_tsd.c
MAPI_GLDISPATCH_ENTRY_FILES += entry_simple_asm.c
MAPI_GLDISPATCH_ENTRY_FILES += entry_common.c
endif
if GLDISPATCH_TYPE_PPC64LE_TLS
MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64le_tls.c
if GLDISPATCH_TYPE_PPC64_TLS
MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64_tls.c
MAPI_GLDISPATCH_ENTRY_FILES += entry_simple_asm.c
MAPI_GLDISPATCH_ENTRY_FILES += entry_common.c
endif

View file

@ -35,6 +35,9 @@
#include "glapi.h"
#include "glvnd/GLdispatchABI.h"
#if !defined(_CALL_ELF) || (_CALL_ELF == 1)
#error "ELFv1 ABI is not supported"
#endif
// NOTE: These must be powers of two:
#define ENTRY_STUB_ALIGN 64
@ -86,15 +89,15 @@ __asm__(".balign " U_STRINGIFY(GLDISPATCH_PAGE_SIZE) "\n"
__asm__(".text\n");
__asm__("ppc64le_current_tls:\n\t"
__asm__("ppc64_current_tls:\n\t"
" addis 3, 2, _glapi_tls_Current@got@tprel@ha\n\t"
" ld 3, _glapi_tls_Current@got@tprel@l(3)\n\t"
" blr\n"
);
extern uint64_t ppc64le_current_tls();
extern uint64_t ppc64_current_tls();
const int entry_type = __GLDISPATCH_STUB_PPC64LE;
const int entry_type = __GLDISPATCH_STUB_PPC64;
const int entry_stub_size = ENTRY_STUB_ALIGN;
static const uint32_t ENTRY_TEMPLATE[] =
@ -146,7 +149,7 @@ void entry_generate_default_code(int index, int slot)
memcpy(entry, ENTRY_TEMPLATE, sizeof(ENTRY_TEMPLATE));
*((uint64_t *) (entry + TEMPLATE_OFFSET_TLS_ADDR)) = (uintptr_t) ppc64le_current_tls();
*((uint64_t *) (entry + TEMPLATE_OFFSET_TLS_ADDR)) = (uintptr_t) ppc64_current_tls();
*((uint64_t *) (entry + TEMPLATE_OFFSET_SLOT)) = slot * sizeof(mapi_func);
// This sequence is from the PowerISA Version 2.07B book.

View file

@ -34,6 +34,9 @@
#include "glapi.h"
#include "glvnd/GLdispatchABI.h"
#if !defined(_CALL_ELF) || (_CALL_ELF == 1)
#error "ELFv1 ABI is not supported"
#endif
// NOTE: These must be powers of two:
#define ENTRY_STUB_ALIGN 256
@ -115,7 +118,7 @@ __asm__(".balign " U_STRINGIFY(GLDISPATCH_PAGE_SIZE) "\n"
"public_entry_end:");
__asm__(".text\n");
const int entry_type = __GLDISPATCH_STUB_PPC64LE;
const int entry_type = __GLDISPATCH_STUB_PPC64;
const int entry_stub_size = ENTRY_STUB_ALIGN;
static const uint32_t ENTRY_TEMPLATE[] =

View file

@ -54,10 +54,10 @@ else
_entry_files += 'entry_armv7_tsd.c'
elif gl_dispatch_type == 'aarch64_tsd'
_entry_files += 'entry_aarch64_tsd.c'
elif gl_dispatch_type == 'ppc64le_tls'
_entry_files += 'entry_ppc64le_tls.c'
elif gl_dispatch_type == 'ppc64le_tsd'
_entry_files += 'entry_ppc64le_tsd.c'
elif gl_dispatch_type == 'ppc64_tls'
_entry_files += 'entry_ppc64_tls.c'
elif gl_dispatch_type == 'ppc64_tsd'
_entry_files += 'entry_ppc64_tsd.c'
else
error('No matching ASM file for @0@'.format(gl_dispatch_type))
endif

View file

@ -164,7 +164,7 @@ static void patch_aarch64(char *writeEntry, const char *execEntry,
#endif
}
static void patch_ppc64le(char *writeEntry, const char *execEntry,
static void patch_ppc64(char *writeEntry, const char *execEntry,
int stubSize, void *incrementPtr)
{
#if defined(__PPC64__)
@ -176,9 +176,9 @@ static void patch_ppc64le(char *writeEntry, const char *execEntry,
// 1000:
0x7D2903A6, // mtctr 9
0xE96C0020, // ld 11, 9000f-1000b(12)
0xE92B0000, // ld 9, 0(11)
0x812B0000, // lwz 9, 0(11)
0x39290001, // addi 9, 9, 1
0xF92B0000, // std 9, 0(11)
0x912B0000, // stw 9, 0(11)
0x7D2902A6, // mfctr 9
0x4E800020, // blr
0x60000000, // nop
@ -220,7 +220,7 @@ GLboolean dummyCheckPatchSupported(int type, int stubSize)
case __GLDISPATCH_STUB_ARMV7_THUMB:
case __GLDISPATCH_STUB_AARCH64:
case __GLDISPATCH_STUB_X32:
case __GLDISPATCH_STUB_PPC64LE:
case __GLDISPATCH_STUB_PPC64:
return GL_TRUE;
default:
return GL_FALSE;
@ -253,8 +253,8 @@ GLboolean dummyPatchFunction(int type, int stubSize,
case __GLDISPATCH_STUB_AARCH64:
patch_aarch64(writeAddr, execAddr, stubSize, incrementPtr);
break;
case __GLDISPATCH_STUB_PPC64LE:
patch_ppc64le(writeAddr, execAddr, stubSize, incrementPtr);
case __GLDISPATCH_STUB_PPC64:
patch_ppc64(writeAddr, execAddr, stubSize, incrementPtr);
break;
default:
assert(0);