vnd-glapi: allow asm to be used on ELFv2 ppc64 big endian
These entry points are actually not little endian specific, but they are specific to ELFv2 ABI. ELFv2 ABI can be used on either little or big endian, and there are distributions doing so (e.g. Void Linux, Adélie Linux) as well as other OSes transitioning (FreeBSD). These have been confirmed to work on a Power Mac G5 running Void Linux.
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4852538bdb
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27
configure.ac
27
configure.ac
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@ -137,8 +137,15 @@ if test "x$enable_asm" = xyes; then
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asm_arch=aarch64
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;;
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powerpc64le)
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asm_arch=ppc64le
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asm_arch=ppc64
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;;
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powerpc64)
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AC_COMPILE_IFELSE([AC_LANG_SOURCE([
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#if !defined(_CALL_ELF) || (_CALL_ELF) == 1
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# error "ELFv1 ABI"
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#endif
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])],
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[asm_arch=ppc64],[])
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esac
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case "$asm_arch" in
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@ -158,9 +165,9 @@ if test "x$enable_asm" = xyes; then
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DEFINES="$DEFINES -DUSE_AARCH64_ASM"
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AC_MSG_RESULT([yes, aarch64])
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;;
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ppc64le)
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DEFINES="$DEFINES -DUSE_PPC64LE_ASM"
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AC_MSG_RESULT([yes, ppc64le])
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ppc64)
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DEFINES="$DEFINES -DUSE_PPC64_ASM"
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AC_MSG_RESULT([yes, ppc64])
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;;
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*)
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AC_MSG_RESULT([no, platform '$host_cpu' not supported])
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@ -240,13 +247,13 @@ xaarch64)
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gldispatch_entry_type=aarch64_tsd
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gldispatch_use_tls=no
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;;
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xppc64le)
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# For ppc64le, allow both the TLS and TSD stubs for now.
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xppc64)
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# For ppc64, allow both the TLS and TSD stubs for now.
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if test "x$HAVE_INIT_TLS" = "xyes" ; then
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gldispatch_entry_type=ppc64le_tls
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gldispatch_entry_type=ppc64_tls
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gldispatch_use_tls=yes
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else
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gldispatch_entry_type=ppc64le_tsd
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gldispatch_entry_type=ppc64_tsd
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gldispatch_use_tls=no
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fi
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;;
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@ -266,8 +273,8 @@ AM_CONDITIONAL([GLDISPATCH_TYPE_X86_TLS], [test "x$gldispatch_entry_type" = "xx8
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AM_CONDITIONAL([GLDISPATCH_TYPE_X86_TSD], [test "x$gldispatch_entry_type" = "xx86_tsd"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_X86_64_TLS], [test "x$gldispatch_entry_type" = "xx86_64_tls"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_X86_64_TSD], [test "x$gldispatch_entry_type" = "xx86_64_tsd"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64LE_TLS], [test "x$gldispatch_entry_type" = "xppc64le_tls"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64LE_TSD], [test "x$gldispatch_entry_type" = "xppc64le_tsd"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64_TLS], [test "x$gldispatch_entry_type" = "xppc64_tls"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_PPC64_TSD], [test "x$gldispatch_entry_type" = "xppc64_tsd"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_ARMV7_TSD], [test "x$gldispatch_entry_type" = "xarmv7_tsd"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_AARCH64_TSD], [test "x$gldispatch_entry_type" = "xaarch64_tsd"])
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AM_CONDITIONAL([GLDISPATCH_TYPE_PURE_C], [test "x$gldispatch_entry_type" = "xpure_c"])
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@ -95,9 +95,14 @@ enum {
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__GLDISPATCH_STUB_X32,
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/*!
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* Used for stubs on PPC64LE systems.
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* Used for stubs on PPC64 systems.
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*/
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__GLDISPATCH_STUB_PPC64LE,
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__GLDISPATCH_STUB_PPC64,
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/*!
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* Used for stubs on PPC64LE systems. Same as PPC64, for compatibility.
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*/
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__GLDISPATCH_STUB_PPC64LE = __GLDISPATCH_STUB_PPC64,
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};
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/*!
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@ -55,8 +55,8 @@ if not with_asm.disabled()
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add_project_arguments('-DUSE_ARMV7_ASM', language : 'c')
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elif host_machine.cpu_family() == 'aarch64'
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add_project_arguments('-DUSE_AARCH64_ASM', language : 'c')
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elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
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add_project_arguments('-DUSE_PPC64LE_ASM', language : 'c')
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elif host_machine.cpu_family() == 'ppc64' and cc.get_define('_CALL_ELF') == '2'
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add_project_arguments('-DUSE_PPC64_ASM', language : 'c')
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elif with_asm.enabled()
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error('No ASM available for @0@ (@1@ endian)'.format(host_machine.system(), host_machine.endian()))
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else
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@ -117,8 +117,8 @@ if use_asm
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gl_dispatch_type = 'armv7_tsd'
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elif host_machine.cpu_family() == 'aarch64'
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gl_dispatch_type = 'aarch64_tsd'
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elif host_machine.cpu_family() == 'ppc64' and host_machine.endian() == 'little'
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gl_dispatch_type = 'ppc64le_@0@'.format(have_tls ? 'tls' : 'tsd')
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elif host_machine.cpu_family() == 'ppc64'
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gl_dispatch_type = 'ppc64_@0@'.format(have_tls ? 'tls' : 'tsd')
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endif
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endif
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message('Using dispatch stub type: @0@'.format(gl_dispatch_type))
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@ -97,7 +97,7 @@ extern char glx_entrypoint_end[];
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"ldr x16, [x16, #:lo12:(entrypointFunctions + " slot "*8)]\n" \
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"br x16\n"
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#elif defined(USE_PPC64LE_ASM)
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#elif defined(USE_PPC64_ASM) && defined(_CALL_ELF) && (_CALL_ELF == 2)
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#define STUB_SIZE 32
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#define STUB_ASM_ARCH(slot) \
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@ -95,7 +95,7 @@ static void InvalidateCache(void)
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// See http://community.arm.com/groups/processors/blog/2010/02/17/caches-and-self-modifying-code
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__builtin___clear_cache(public_entry_start, public_entry_end);
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}
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#elif defined(USE_PPC64LE_ASM)
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#elif defined(USE_PPC64_ASM)
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static void InvalidateCache(void)
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{
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// Note: We might be able to get away with only invalidating each cache
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@ -38,14 +38,14 @@ MAPI_GLDISPATCH_ENTRY_FILES += entry_simple_asm.c
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MAPI_GLDISPATCH_ENTRY_FILES += entry_common.c
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endif
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if GLDISPATCH_TYPE_PPC64LE_TSD
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MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64le_tsd.c
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if GLDISPATCH_TYPE_PPC64_TSD
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MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64_tsd.c
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MAPI_GLDISPATCH_ENTRY_FILES += entry_simple_asm.c
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MAPI_GLDISPATCH_ENTRY_FILES += entry_common.c
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endif
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if GLDISPATCH_TYPE_PPC64LE_TLS
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MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64le_tls.c
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if GLDISPATCH_TYPE_PPC64_TLS
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MAPI_GLDISPATCH_ENTRY_FILES = entry_ppc64_tls.c
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MAPI_GLDISPATCH_ENTRY_FILES += entry_simple_asm.c
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MAPI_GLDISPATCH_ENTRY_FILES += entry_common.c
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endif
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@ -35,6 +35,9 @@
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#include "glapi.h"
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#include "glvnd/GLdispatchABI.h"
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#if !defined(_CALL_ELF) || (_CALL_ELF == 1)
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#error "ELFv1 ABI is not supported"
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#endif
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// NOTE: These must be powers of two:
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#define ENTRY_STUB_ALIGN 64
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@ -86,15 +89,15 @@ __asm__(".balign " U_STRINGIFY(GLDISPATCH_PAGE_SIZE) "\n"
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__asm__(".text\n");
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__asm__("ppc64le_current_tls:\n\t"
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__asm__("ppc64_current_tls:\n\t"
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" addis 3, 2, _glapi_tls_Current@got@tprel@ha\n\t"
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" ld 3, _glapi_tls_Current@got@tprel@l(3)\n\t"
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" blr\n"
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);
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extern uint64_t ppc64le_current_tls();
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extern uint64_t ppc64_current_tls();
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const int entry_type = __GLDISPATCH_STUB_PPC64LE;
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const int entry_type = __GLDISPATCH_STUB_PPC64;
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const int entry_stub_size = ENTRY_STUB_ALIGN;
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static const uint32_t ENTRY_TEMPLATE[] =
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memcpy(entry, ENTRY_TEMPLATE, sizeof(ENTRY_TEMPLATE));
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*((uint64_t *) (entry + TEMPLATE_OFFSET_TLS_ADDR)) = (uintptr_t) ppc64le_current_tls();
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*((uint64_t *) (entry + TEMPLATE_OFFSET_TLS_ADDR)) = (uintptr_t) ppc64_current_tls();
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*((uint64_t *) (entry + TEMPLATE_OFFSET_SLOT)) = slot * sizeof(mapi_func);
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// This sequence is from the PowerISA Version 2.07B book.
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@ -34,6 +34,9 @@
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#include "glapi.h"
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#include "glvnd/GLdispatchABI.h"
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#if !defined(_CALL_ELF) || (_CALL_ELF == 1)
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#error "ELFv1 ABI is not supported"
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#endif
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// NOTE: These must be powers of two:
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#define ENTRY_STUB_ALIGN 256
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"public_entry_end:");
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__asm__(".text\n");
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const int entry_type = __GLDISPATCH_STUB_PPC64LE;
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const int entry_type = __GLDISPATCH_STUB_PPC64;
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const int entry_stub_size = ENTRY_STUB_ALIGN;
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static const uint32_t ENTRY_TEMPLATE[] =
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@ -54,10 +54,10 @@ else
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_entry_files += 'entry_armv7_tsd.c'
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elif gl_dispatch_type == 'aarch64_tsd'
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_entry_files += 'entry_aarch64_tsd.c'
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elif gl_dispatch_type == 'ppc64le_tls'
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_entry_files += 'entry_ppc64le_tls.c'
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elif gl_dispatch_type == 'ppc64le_tsd'
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_entry_files += 'entry_ppc64le_tsd.c'
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elif gl_dispatch_type == 'ppc64_tls'
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_entry_files += 'entry_ppc64_tls.c'
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elif gl_dispatch_type == 'ppc64_tsd'
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_entry_files += 'entry_ppc64_tsd.c'
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else
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error('No matching ASM file for @0@'.format(gl_dispatch_type))
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endif
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@ -164,7 +164,7 @@ static void patch_aarch64(char *writeEntry, const char *execEntry,
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#endif
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}
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static void patch_ppc64le(char *writeEntry, const char *execEntry,
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static void patch_ppc64(char *writeEntry, const char *execEntry,
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int stubSize, void *incrementPtr)
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{
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#if defined(__PPC64__)
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// 1000:
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0x7D2903A6, // mtctr 9
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0xE96C0020, // ld 11, 9000f-1000b(12)
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0xE92B0000, // ld 9, 0(11)
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0x812B0000, // lwz 9, 0(11)
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0x39290001, // addi 9, 9, 1
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0xF92B0000, // std 9, 0(11)
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0x912B0000, // stw 9, 0(11)
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0x7D2902A6, // mfctr 9
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0x4E800020, // blr
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0x60000000, // nop
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case __GLDISPATCH_STUB_ARMV7_THUMB:
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case __GLDISPATCH_STUB_AARCH64:
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case __GLDISPATCH_STUB_X32:
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case __GLDISPATCH_STUB_PPC64LE:
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case __GLDISPATCH_STUB_PPC64:
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return GL_TRUE;
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default:
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return GL_FALSE;
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case __GLDISPATCH_STUB_AARCH64:
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patch_aarch64(writeAddr, execAddr, stubSize, incrementPtr);
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break;
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case __GLDISPATCH_STUB_PPC64LE:
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patch_ppc64le(writeAddr, execAddr, stubSize, incrementPtr);
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case __GLDISPATCH_STUB_PPC64:
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patch_ppc64(writeAddr, execAddr, stubSize, incrementPtr);
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break;
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default:
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assert(0);
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